The Rohm BU90T82 parallel-to-LVDS transmitter converts the STM32MP15 LTDC parallel interface to one suitable for LVDS displays.
Kernel configuration
The support for the LVDS panel support through the following kernel configuration option:
-
DRM simple panel driver (
CONFIG_DRM_PANEL_SIMPLE
)
This option is enabled as built-in on the default ConnectCore MP15 kernel configuration file.
Kernel driver
The driver for the simple panel is located at:
File | Description |
---|---|
Simple panel driver |
Device tree bindings and customization
Digi provides support to two LVDS LCD displays through device tree overlay files:
-
AUO 10.1" (G101EVN01.0) in
arch/arm/boot/dts/_ov_board_g101evn010-lvds_ccmp15-dvk.dts
. -
Fusion 10.1" (F10A-0102) in
arch/arm/boot/dts/_ov_board_fusion10-lvds_ccmp15-dvk.dts
.
IOMUX configuration
The ConnectCore MP15 Development Kit device tree contains two different pinctrl configurations for the LCD pads:
-
24-bit with only MSB 18-bit data LCD, for displays that only support 18-bits (RGB666)
-
24-bit LCD, for displays that support 24-bits (RGB888)
&pinctrl {
ccmp15_ltdc_18_bits_pins: ltdc-18bits-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
<STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
<STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
<STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
<STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
<STM32_PINMUX('B', 0, AF9)>, /* LCD_R3 */
<STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
<STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
<STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
<STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
<STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
<STM32_PINMUX('G', 10, AF9)>, /* LCD_G3 */
<STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
<STM32_PINMUX('F', 11, AF14)>, /* LCD_G5 */
<STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
<STM32_PINMUX('B', 5, AF14)>, /* LCD_G7 */
<STM32_PINMUX('A', 3, AF9)>, /* LCD_B2 */
<STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
<STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
<STM32_PINMUX('I', 5, AF14)>, /* LCD_B5 */
<STM32_PINMUX('I', 6, AF14)>, /* LCD_B6 */
<STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('H', 2, GPIO)>, /* LCD_R0 */
<STM32_PINMUX('H', 3, GPIO)>, /* LCD_R1 */
<STM32_PINMUX('B', 1, GPIO)>, /* LCD_G0 */
<STM32_PINMUX('E', 6, GPIO)>, /* LCD_G1 */
<STM32_PINMUX('E', 4, GPIO)>, /* LCD_B0 */
<STM32_PINMUX('G', 12, GPIO)>; /* LCD_B1 */
bias-pull-down;
drive-push-pull;
slew-rate = <0>;
};
};
ccmp15_ltdc_24_bits_pins: ltdc-24bits-0 {
pins {
pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
<STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
<STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
<STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
<STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
<STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
<STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
<STM32_PINMUX('B', 0, AF9)>, /* LCD_R3 */
<STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
<STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
<STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
<STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
<STM32_PINMUX('B', 1, AF14)>, /* LCD_G0 */
<STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
<STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
<STM32_PINMUX('G', 10, AF9)>, /* LCD_G3 */
<STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
<STM32_PINMUX('F', 11, AF14)>, /* LCD_G5 */
<STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
<STM32_PINMUX('B', 5, AF14)>, /* LCD_G7 */
<STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */
<STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
<STM32_PINMUX('A', 3, AF9)>, /* LCD_B2 */
<STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
<STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
<STM32_PINMUX('I', 5, AF14)>, /* LCD_B5 */
<STM32_PINMUX('I', 6, AF14)>, /* LCD_B6 */
<STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
};
ccmp15_ltdc_sleep_pins: ltdc-sleep-0 {
pins {
pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
<STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
<STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
<STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
<STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
<STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
<STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
<STM32_PINMUX('B', 0, ANALOG)>, /* LCD_R3 */
<STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
<STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
<STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
<STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
<STM32_PINMUX('B', 1, ANALOG)>, /* LCD_G0 */
<STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
<STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
<STM32_PINMUX('G', 10, ANALOG)>, /* LCD_G3 */
<STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
<STM32_PINMUX('F', 11, ANALOG)>, /* LCD_G5 */
<STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
<STM32_PINMUX('B', 5, ANALOG)>, /* LCD_G7 */
<STM32_PINMUX('E', 4, ANALOG)>, /* LCD_B0 */
<STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
<STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B2 */
<STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
<STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
<STM32_PINMUX('I', 5, ANALOG)>, /* LCD_B5 */
<STM32_PINMUX('I', 6, ANALOG)>, /* LCD_B6 */
<STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
};
};
};
Enable the LVDS bridge and disable conflicting interfaces
On the ConnectCore MP15 Development Kit, the HDMI bridge is enabled by default.
The LVDS bridge is disabled by default because many LVDS LCD lines are also multiplexed with other functionality.
To enable it, you must enable the panel
node and disable the conflicting interfaces on your device tree:
-
USART3
-
LT8912
-
DSI
Digi provides pre-compiled device tree overlays that do exactly this so you can test the LVDS interface on an LCD display without needing to recompile a device tree.
To enable the LVDS with the AUO 10" LCD display, run the following command in U-Boot:
=> setenv overlays _ov_board_g101evn010-lvds_ccmp15-dvk.dtbo
To enable the LVDS with the Fusion 10" LCD display, run the following command in U-Boot:
=> setenv overlays _ov_board_fusion10-lvds_ccmp15-dvk.dtbo
See Device tree files and overlays for more information.