The NXP i.MX8QXP CPU has ten I2C buses. The following I2C interfaces are available on the ConnectCore 8X SOM (multiplexed with other functionality):
-
Four with DMA support (I2C0, I2C1, I2C2, I2C3)
-
Two in the display ports (MIPI-DSI0, MIPI-DSI1)
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Two in the camera ports (MIPI-CSI0, CSI)
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One dedicated for the PMIC
-
One dedicated for the Cortex M4 (CM40)
The CPU facilitates the functionality of both I2C master and slave according to the I2C Bus Specification v2.1, but the Linux kernel only contains an I2C bus master driver.
On the ConnectCore 8X system-on-module:
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Dedicated PMIC I2C port connects internally to the power management IC (PMIC) at the following address:
Interface Address (7-bit) PMIC
0x08
-
I2C0 connects to the on-module Micro Controller Assist (MCA), and the Atmel Cryptochip at the following addresses:
Interface Address (7-bit) Cryptochip
0x60
MCA
0x63
On the ConnectCore 8X SBC Pro:
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I2C3 is connected to the on-board audio chip and routed to the parallel camera so it can connect to an image sensor.
Interface Address (7-bit) Maxim MAX98089 sound chip
0x10
OmniVision CSI camera
0x3C
-
I2C3 is also available on the miniPCIe connector and the expansion connector, where you can connect additional devices.
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MIPI-DSI0 I2C is routed to LVDS0 connector so it can connect to a touch controller.
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MIPI-DSI1 I2C is routed to LVDS1 connector so it can connect to a touch controller.
Interface Address (7-bit) Notes Goodix touch controller
0x14, 0x5D
On the ConnectCore 8X boards, an inconsistent reset sequence makes the display’s Goodix touch controller respond on one of two I2C addresses: 0x14 or 0x5D.
-
MIPI-CSI0 I2C is routed to MIPI camera connector so it can connect to an image sensor.
Interface Address (7-bit) MIPI-CSI2 OmniVision camera
0x3C
Kernel configuration
You can manage the I2C driver support through the kernel configuration:
-
IMX Low Power I2C interface (CONFIG_I2C_IMX_LPI2C)
This kernel configuration option is enabled as built-in on the default ConnectCore 8X kernel configuration file.
Kernel driver
The driver for the I2C interface is located at:
| File | Description |
|---|---|
i.MX low power I2C controller driver |
Device tree bindings and customization
The i.MX8QXP I2C interface device tree binding is documented at Documentation/devicetree/bindings/i2c/i2c-imx.txt.
The I2C interfaces are defined in the CPU, system-on-module, and carrier board device tree files.
Example: MIPI-DSI0 I2C port
Bus definition
i2c0_mipi_lvds0: i2c@56226000 {
compatible = "fsl,imx8qxp-lpi2c", "fsl,imx8qm-lpi2c";
reg = <0x0 0x56226000 0x0 0x1000>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&irqsteer_mipi_lvds0>;
clocks = <&clk IMX8QXP_MIPI0_I2C0_CLK>,
<&clk IMX8QXP_MIPI0_I2C0_IPG_CLK>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX8QXP_MIPI0_I2C0_DIV>;
assigned-clock-rates = <24000000>;
power-domains = <&pd_mipi_dsi_0_i2c0>;
status = "disabled";
};Bus enabling, I2C slave devices, and IOMUX
&i2c0_mipi_lvds0 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
clock-frequency = <100000>;
status = "okay";
/* I2C slave devices */
goodix_touch1: gt9271@14 {
[...]
};
goodix_touch2: gt9271@5D {
[...]
};
};
pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
fsl,pins = <
SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020
SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020
>;
};Using the I2C bus
You can access the I2C bus from your Android application. See I2C API for more information about the I2C APIx.
Sample application
The I2C Sample Application demonstrates the usage of the I2C API. In this example you can access and control an external I2C EEPROM memory. Application can perform read, write and erase actions displaying results in an hexadecimal list view.
Go to GitHub to see the application instructions and source code.
