The NXP i.MX8M Nano CPU has one 10/100/1000 Ethernet MAC.
On the ConnectCore 8M Nano Development Kit:
-
Ethernet port is connected to a 10/100/1000 Atheros AR8031 PHY.
Kernel configuration
You can manage the Ethernet driver and PHY Device support through the following kernel configuration options:
-
FEC Ethernet controller (of ColdFire and some i.MX CPUs) (
CONFIG_FEC
) -
PHY device support for AT803x (
CONFIG_AT803X_PHY
)
These options are enabled as built-in on the default ConnectCore 8M Nano kernel configuration file.
Kernel driver
The driver for the Ethernet interface is located at:
File | Description |
---|---|
i.MX FEC driver |
|
Driver for Atheros 8031 PHY |
Device tree bindings and customization
The i.MX8M Nano Ethernet interface device tree binding is documented at Documentation/devicetree/bindings/net/fsl,fec.yaml
.
The Ethernet interface is defined in the i.MX8M Nano CPU and ConnectCore 8M Nano Development Kit device tree files.
Example: FEC1 on ConnectCore 8M Nano Development Kit
Definition of the FEC
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mn-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_ENET1_ROOT>,
<&clk IMX8MN_CLK_ENET1_ROOT>,
<&clk IMX8MN_CLK_ENET_TIMER>,
<&clk IMX8MN_CLK_ENET_REF>,
<&clk IMX8MN_CLK_ENET_PHY_REF>;
clock-names = "ipg", "ahb", "ptp",
"enet_clk_ref", "enet_out";
assigned-clocks = <&clk IMX8MN_CLK_ENET_AXI>,
<&clk IMX8MN_CLK_ENET_TIMER>,
<&clk IMX8MN_CLK_ENET_REF>,
<&clk IMX8MN_CLK_ENET_PHY_REF>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
<&clk IMX8MN_SYS_PLL2_100M>,
<&clk IMX8MN_SYS_PLL2_125M>,
<&clk IMX8MN_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <125000000>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
nvmem-cells = <&fec_mac_address>;
nvmem-cell-names = "mac-address";
nvmem_macaddr_swap;
fsl,stop-mode = <&gpr 0x10 3>;
status = "disabled";
};
IOMUX configuration
pinctrl_fec1_gpio: fec1gpiogrp {
fsl,pins = <
/* PHY reset */
MX8MN_IOMUXC_SPDIF_TX_GPIO5_IO3 0x19
/* PHY interrupt */
MX8MN_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19
>;
};
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3
MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
>;
};
Ethernet enabling and PHY parameters
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1_gpio>,
<&pinctrl_fec1>;
phy-mode = "rgmii-id";
phy-handle = <ðphy0>;
digi,mdio-lt-supply = <®_1v8_ext>;
phy-supply = <®_3v3_eth0>;
phy-reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
digi,phy-reset-in-suspend;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
at803x,eee-disabled;
at803x,vddio-1p8v;
};
};
};
MAC address
The MAC address of the i.MX8M Nano Ethernet interface is programmed in the U-Boot environment (variable ethaddr
) on the ConnectCore 8M Nano eMMC.
The MAC address is also printed on the module label.
U-Boot writes the MAC address in the ethaddr
environment variable into its respective device tree fec
node under the local-mac-address
property.
For more information, see Environment variables.
Ethernet user space usage
In the Linux system, the Ethernet interface is known as eth0
.
The Ethernet (FEC) driver exposes device data through the sysfs at /sys/class/net/eth0
.
You can use NetworkManager to configure Ethernet settings such as IP and netmask.