The following table lists all available MCA IOs and their capabilities:
| MCA IO | PAD LGA/CS* | Digital I/O | IRQ-capable | Debounce-capable | ADC | 32KHz clock | 1.2 Vref |
|---|---|---|---|---|---|---|---|
MCA_IO0 |
A2/76 |
|
|
|
|
||
MCA_IO1 |
B2 |
|
|
|
|
||
MCA_IO2/EXT_VREF |
B5 |
|
|
|
|
||
MCA_IO3 |
C3 |
|
|
||||
MCA_IO4 |
A3/75 |
|
|
||||
MCA_IO5 |
B6 |
|
|
|
|
||
MCA_IO6/CLKOUT32K |
C4 |
|
|
||||
SWD_DIO/MCA_IO7 |
A7/71 |
|
* CS = castellated pads
|
Some of the MCA GPIO pins can be configured as ADC channels. When configured as ADC channel, a GPIO cannot be requested as a standard GPIO. For information about configuring an MCA pin as ADC channel, see Analog-to-Digital Converter (ADC). |
