The NXP i.MX8QXP CPU has four SPI buses.

On the ConnectCore 8X system-on-module:

  • All four SPI ports are available (multiplexed with other functionality) either on the castellated or LGA pads

On the ConnectCore 8X SBC Express:

  • SPI3 port is available at the expansion header with one chip select (CS0)

On the ConnectCore 8X SBC Pro:

  • SPI0 port is available at the expansion header with two chip selects (CS0 and CS1)

Kernel configuration

You can manage the SPI driver support through the kernel configuration option:

  • Freescale i.MX LPSPI controller (CONFIG_SPI_FSL_LPSPI)

This option is enabled as built-in on the default ConnectCore 8X kernel configuration file.

Kernel driver

The SPI bus driver for the ConnectCore 8X system-on-module is located at drivers/spi/spi-fsl-lpspi.c.

Device tree bindings and customization

The i.MX8QXP SPI interface device tree binding is documented at Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt.

The common i.MX8QXP CPU device tree defines all the SPI ports. The platform device tree must:

  • Enable the required SPI port, by setting the status property to okay.

  • Choose the chip selects using property cs-gpios and their number using property fsl,spi-num-chipselects.

  • Configure the IOMUX of the pads that will work as SPI port.

  • Add the SPI slave devices as children of the SPI bus node.

Example: SPI3 port (as master) on the ConnectCore 8X SBC Express

ConnectCore 8X SBC Express device tree
&lpspi3 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi3>;
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <0>;
	status = "okay";
};

&iomuxc {
	pinctrl_lpspi3: lpspi3grp {
		fsl,pins = <
			SC_P_SPI3_SCK_ADMA_SPI3_SCK	0x0600004c
			SC_P_SPI3_SDO_ADMA_SPI3_SDO	0x0600004c
			SC_P_SPI3_SDI_ADMA_SPI3_SDI	0x0600004c
			SC_P_SPI3_CS0_ADMA_SPI3_CS0	0x0600004c
		>;
	};
};

SPI user space usage

The SPI bus cannot be accessed directly from user space. Instead, it is accessed via the SPI client drivers. However, a special sample client driver allows raw access to the SPI bus.

SPI device interface

The Linux kernel offers a sample client driver called spidev that gives you read and write data access to the SPI bus through the /dev interface. You can find this driver under the kernel configuration option User mode SPI device driver support (CONFIG_SPI_SPIDEV). On Digi Embedded Yocto this driver is enabled as a loadable module. The default device tree includes the spidev node in the device tree as an SPI device hanging from the SPI bus:

ConnectCore 8X SBC Express device tree
&lpspi3 {
	[...]
	status = "okay";

	/*
	 * Add your slave devices here. Next is an example of spidev.
	 * Expect a harmless kernel warning if you enable spidev as slave.
	 */
	spidev@0 {
		compatible = "spidev";
		spi-max-frequency = <4000000>;
		reg = <0>;
	};
 };

To use it, load the spidev module from user space:

~# modprobe spidev
spidev spi32766.0: buggy DT: spidev listed directly in DT
Spidev is not a real hardware SPI slave device but a detail of how Linux controls a device. Expect a harmless kernel warning if you enable spidev as slave on the device tree. For reference, see https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=956b200a846e324322f6211034c734c65a38e550

Linux will create a device node in the form /dev/spidevX.Y device node where:

  • X corresponds to the SPI port index, starting from 32766 downwards.

  • Y corresponds to the SPI bus chip select, starting from 0 upwards.

SPI device test application

Build the package dey-examples-spi in your Yocto project to install the test application spidev_test.

This spidev_test application is a simple utility used to test SPI functionality via the spidev device.

Syntax

To display the application’s syntax run:

~# spidev_test --help

Example 1: SPI as master (loopback  test)

Short-circuit the MISO and MOSI lines of your SPI bus to create a loopback that allows the bus to receive the same data it is sending.

Run the application using your spidev node /dev/spidevX.Y, where X is the SPI bus index and Y is the SPI bus chip select:

~# spidev_test -D /dev/spidev32766.0 -v
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@....�..................�.
RX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@....�..................�.

You should receive the same data displayed in the preceding excerpt.