The i.MX8QXP System-On-Chip has a lot of functionality but a limited number of pins (or pads). Even though a single pin can only perform one function at a time, they can be configured internally to perform different functions. This is called pin multiplexing.

The ConnectCore 8X Hardware Reference Manual contains a Module pinout section that identifies all module pads with their corresponding signal name used in the reference boards schematics, and maps them to the corresponding i.MX pad name.

Pad multiplexing

The NXP i.MX8QXP Reference Manual uses a pad name such as FLEXCAN0_RX to refer to the System-On-Chip pads. This pad name typically corresponds to the first pad functionality.

Electrical parameters of a pad

Every pad also has a PAD configuration control register where you can set the pad’s electrical parameters. See the NXP Influence of Pin Setting on System Function and Performance application note for details about setting functional and electrical parameters.

Use the device tree to configure pin IOMUX and pad control

Digi Embedded Yocto uses the Linux kernel device tree to configure the pad multiplexing and electrical characteristics for each of the reference boards. Customers designing their own boards will create a device tree matching their new board design and may need to configure the pads differently.

See Device tree files for an explanation of the Digi Embedded Yocto device tree structure.

The following example shows pad selection and IOMUX setting for a particular device: CAN0. On the Linux kernel source, you can find the CAN0 device tree node in arch/arm64/boot/dts/digi/ccimx8x-sbc-express.dtsi:

ConnectCore 8X SBC Express device tree
/* CAN0 */
&flexcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_3v3_ext>;
	status = "disabled";
};

The pin configuration is defined on the pinctrl-0 property, assigned the "default" name and set to pinctrl_flexcan1:

ConnectCore 8X SBC Express device tree
pinctrl_flexcan1: flexcan0grp {
    fsl,pins = <
        SC_P_FLEXCAN0_TX_ADMA_FLEXCAN0_TX		0x21
        SC_P_FLEXCAN0_RX_ADMA_FLEXCAN0_RX		0x21
    >;
};

The device tree pinctrl documentation binding explains the fsl,pins entry as consisting of three integers representing the IOMUX selection and electrical settings of the pin.

You can look closely at the macro to discern how the pin name for the IC is connected to the desired pad functionality. From left to right, the first part of the macro after the SC_P_ prefix is the PAD/PIN name in the IC. In this example, it is FLEXCAN0_RX. The second part (everything to the right of the PAD/PIN name) represents the functionality you would like to assign to that pad.

The SC_P_FLEXCAN0_RX_ADMA_FLEXCAN0_RX macro defined in include/dt-bindings/pinctrl/pads-imx8qxp.h contains two integers:

#define SC_P_FLEXCAN0_RX_ADMA_FLEXCAN0_RX    SC_P_FLEXCAN0_RX    0

These two integers are:

  • Pin/pad identifier (SC_P_FLEXCAN0_RX)

  • IOMUX configuration setting (0)

The third integer, 0x21, corresponds to the configuration for the PAD control register. This number defines the low-level physical settings of the pin. You can build this integer using the information found in the device tree pinctrl documentation binding. You can also copy and then modify another pin definition that has similar functionality.

Do not configure the same pad twice in the device tree. IOMUX configurations are set by the drivers in the order the kernel probes the configured device. If the same pad is configured differently by two drivers, the settings associated with the last-probed driver will fail to apply and the driver will not be brought up.