The {cpu-family} CPU has two USB controllers, both with integrated PHYs:

  • One USB 2.0 OTG

  • One USB 3.0 SuperSpeed (SS). This controller can also operate as USB 2.0 OTG.

USB controllers naming

On the {cpu-family} hardware reference manual and the ConnectCore 8X carrier boards' schematics the USB controllers are named as follows:

  • The USB 2.0 OTG controller is named USB_OTG1.

  • The USB 3.0 controller is named:

    • USB_SS3, when working as SuperSpeed (SS).

    • USB_OTG2, when working as USB 2.0 OTG.

USB controllers on the ConnectCore 8X

On the ConnectCore 8X system-on-module both controllers are available for peripheral use.

On the ConnectCore 8X SBC Pro:

  • USB_OTG1 is connected to a four-port USB hub that makes it available at:

    • both ports of the stackable dual USB A-type connector on the top side of the board.

    • the PCIe connector (also available on the expansion connector).

    • the XBee socket (also available on the expansion connector).

  • USB_OTG2/USB_SS3 is available at:

    • the USB Type-C connector on the top side of the board.

    • the micro-AB type connector on the bottom side of the board.

      When you connect a USB 3.0 host or device to the USB Type-C connector, the USB_OTG2/USB_SS3 controller will operate as USB 3.0.

      When you connect a USB 2.0 host or device to the USB Type-C or the micro-AB type connectors, the USB_OTG2/USB_SS3 controller will operate as USB 2.0. The micro-AB type connector is not populated on the board by default.

Version 2 of the ConnectCore 8X SBC Pro does not support USB 3.0 SuperSpeed (SS) due to missing serial decoupling capacitors downstream from the analog switch. You can still use the USB Type-C connector to perform connections as a USB 2.0 Host.

Contact Digi Support Services for more information on supporting USB 3.0 SuperSpeed on your carrier board design.

Kernel configuration

You can manage the USB 2.0 support through the kernel configuration options:

  • Support for Host-side USB (CONFIG_USB)

  • EHCI HCD (USB 2.0) support (CONFIG_USB_EHCI_HCD)

  • ChipIdea Highspeed Dual Role Controller (CONFIG_USB_CHIPIDEA)

  • ChipIdea device controller (CONFIG_USB_CHIPIDEA_UDC)

  • ChipIdea host controller (CONFIG_USB_CHIPIDEA_HOST)

  • Freescale MXS USB PHY support (CONFIG_USB_MXS_PHY)

  • OTG support (CONFIG_USB_OTG)

You can manage the USB 3.0 support through the kernel configuration options:

  • Cadence USB3 Dual-Role Controller (CONFIG_USB_CDNS3)

  • Cadence USB3 host controller (CONFIG_USB_CDNS3_HOST)

  • Cadence USB3 device controller (CONFIG_USB_CDNS3_GADGET)

All of these kernel configuration options are enabled as built-in on the default ConnectCore 8X kernel configuration file.

The USB device drivers provide the functionality for the USB gadget drivers. The USB gadget drivers implement one or more "functions", each providing a different capability.

The following gadget drivers are supported and enabled as loadable modules on the default ConnectCore 8X kernel configuration file.

  • Mass Storage Gadget (CONFIG_USB_MASS_STORAGE)

  • Ethernet Gadget with CDC Ethernet support (CONFIG_USB_ETH)

  • Serial Gadget with ACM and CDC OBEX support (CONFIG_USB_G_SERIAL)

Gadget drivers are enabled as loadable modules because only one gadget function can be used at a time. Before using a gadget driver, you must first make sure no other gadget driver is loaded.

Kernel driver

The {cpu-family} universal serial bus (USB) 2.0 driver implements a standard Linux driver interface to the CHIPIDEA USB-HS On-The-Go (OTG) controller. The CHIPIDEA USB 2.0 controller is Enhanced Host Controller Interface (EHCI) compliant. The Cadence USB 3.0 controller is eXtensible Host Controller Interface (xHCI) compliant.

The {cpu-family} USB 2.0 and 3.0 drivers are located at drivers/usb/.

File Description

chipidea/core.c

Chipidea IP core driver

chipidea/udc.c

Chipidea peripheral driver

chipidea/host.c

Chipidea host driver

chipidea/ci_hdrc_imx.c

i.MX glue layer

chipidea/otg.c

Chipidea OTG driver

chipidea/otg_fsm.c

Chipidea OTG HNP and SRP driver

chipidea/usbmisc_imx.c

i.MX SoC abstract layer

cdns3/core.c

Cadence USB3 core driver

cdns3/gadget.c

Cadence USB3 peripheral driver

cdns3/host.c

Cadence USB3 host driver

phy/phy-mxs-usb.c

i.MX USB physical driver

Device tree bindings and customization

The {cpu-family} USB 2.0 controller device tree bindings are documented at Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt.

The {cpu-family} USB 3.0 controller device tree bindings are documented at Documentation/devicetree/bindings/usb/cdns-usb3.txt.

Example: ConnectCore 8X SBC Pro

USB_OTG1 controller is configured by default to work as host, while USB_OTG2/USB_SS3 is configured as otg. This is selected via the dr_mode property on the device tree:

ConnectCore 8X SBC Pro device tree
/* USB_OTG1 connected to usb hub */
&usbotg1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1>;

	vbus-supply = <&reg_3v3_usb_hub>;
	fsl,reset-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

/* USB_OTG2/USB_SS3 */
&usbotg3 {
	dr_mode = "otg";
	extcon = <&typec_ptn5110>;
	status = "okay;
};